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[Electrical Engineer] ASIC Design Engineer

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NESC Staffing is hiring an ASIC Design engineer. This is a W2 contract position in Cedar Rapids IA (Collins Aerospace/ BAE Systems). The target rate is $70/hour on a W2 but we can submit over the rate. Please let me know if you are interested in learning more. I can be reached at 603.319.5124 or aspencer@nesc.com thank you so much and stay well.

This position is for an experienced and motivated Senior Electrical or Computer engineering candidate to be involved in the design, implementation, verification and integration of military GPS products.

Key Responsibilities will include:
-Requirements capture, ASIC / FPGA digital architecture and design using RTL, timing analysis and closure, verification, and system integration
-RTL coding and simulation in VHDL or Verilog
-Testbench development for the verification of RTL blocks using VHDL or SystemVerilog

This position is located in Cedar Rapids, IA.

This position requires these skills and abilities:
-RTL coding and simulation in VHDL or Verilog OR Testbench development for the verification of RTL blocks using UVM and SystemVerilog
-Digital circuit architecture, design, resource tradeoffs, timing analysis and timing closure
-Proficiency using ASIC and/or FPGA simulation and synthesis tools (e.g. Modelsim, Synopsys, FPGA-specific tools)
-Familiarity with revision control concepts and tools (e.g. Subversion)
-Ability to work with minimal supervision, part of a team of engineers with a variety of skills and backgrounds
-Strong oral and written communication skills and the ability to document and present one's work and status
-Bachelor's Degree in applicable engineering field

Desired skills of a successful candidate:
-Familiarity with best practice chip-level verification techniques and languages (e.g. constrained random, functional coverage, SystemVerilog)
-ASIC / FPGA lab validation with advanced lab equipment
-Design for Test (DFT) and manufacturability issues
-Experience with Unix, scripting, C/C++, and/or Perl


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