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Verification Engineer - Rate is open + per diem

Posted by: Von Mizener Consulting <> on May 28, 2017 at 00:04:01. Click here to reply to this post via Email.Click here for help with email link

Contract / Temp to Direct / Direct Hire: Contract
City: Boxboro
State: Massachusetts
Country: United States

Seeking a talented Principal Verification Engineer for regular or temporary employment
to fill a critical role developing and enhancing testbenches written
in C/C++ and SystemVerilog, performing SoC level integration and
testing, and debugging at the SoC level.

Job Duties:
- SOC level Integration and functional verification of a complex CPU/GPU SOCs.

- Work closely with a team members to understand and verify new and
existing design features.

- Debug of Verilog RTL and System Verilog & C/C++ testbench at the SOC-level.

- One or more of the following:
o Measure performance metrics against specification.
o Integrate Verification IP and maintain working verification environment.
o Verify complex features include coherency and power related features.


- 10 or more years of proven SOC level verification experience on
large SOCs

- Knowledgeable in C/C++, OO programming, Verilog, System Verilog, and
scripting languages (Perl, etc)

- Familiar with constrained random verification

- Excellent debug skills, ability to analyze and isolate
design/testbench issues using various techniques including waveforms
and log files.

- Familiar with hardware modeling and/or assertion-based verification

- Experience in one or more of the following areas:

- Measuring feature performance metrics against specification is

- SOC Level Verification IP integration

- Data Coherency Feature Verification in complex data path SOCs

- Power aware simulations which may include gate level verification of
power aware features.

- Background in GPU/CPU architecture along with significant memory
system and /or SoC architecture experience is important.

* Strong English verbal and written communication skills required.

Education Requirements:
* BSEE, BSCS, or equivalent experience in closely related field.
Job Location
* Boxboro, MA
Job Duration
6-9+ months
key words:
* GPU, CPU, HVL, Hardware Verification Language, Vera, Specman, 'e,
Power Aware, Constrained Random, SoC Verification, Verification
Plans, Assertion Based Verifiction, ABV, Code coverage, Coverage
Points, Coverage Bins, Functional Coverage Points, Functional
Coverage Bins, Coverage Closure, Object Oriented, OO, Aspect
Oriented, Multiprocessing, Multi-processing, Snooping, Write-back
cache, Write-through cache, Directory-based cache, Symmetric
multiprocessing, Asymmetric multiprocessing, Shared memory,
Distributed shared memory, UMA, NUMA, Computer cluster,
Multi-thread, multithread, MSI, MESI.


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